Google adds two TPU 8 systems for long-context and confidential AI

Google has added two systems to its eighth-generation Tensor Processing Unit (TPU) lineup: TPU 8i Max, aimed at very long context windows and the highest compute density per rack, and TPU 8tx, built for secure and confidential inference. The announcement, made on 9 November, gives Google four TPU systems in a single year, which the company says is a first.

This follows the previous article in this thread, Google open-sources TPU Sync to speed up long AI sessions on its chips, which covered software for moving model memory off TPU chips. This update is about hardware: two new configurations of existing eighth-generation silicon, both listed as “coming soon”.

What changed since TPU 8t and 8i

At Google Cloud Next in April, Google introduced two specialised TPUs in the same generation: TPU 8t for large-scale training and TPU 8i for real-time reasoning. Google claims they offer up to 2.7 times better training performance and 80% better inference price performance, respectively, compared with its previous generation of TPUs. Those April chips have not yet shipped broadly; MLQ.ai reports that Google said then they would be generally available later in 2026.

The two new systems sit alongside them. Google Cloud summarises the full lineup this way:

• TPU 8t for scale-up training
• TPU 8i for low-latency reasoning
• TPU 8tx for confidential computing
• TPU 8i Max for massive context windows and the highest compute density per rack

Amin Vahdat, Google’s SVP and Chief Technologist for AI and Infrastructure, wrote the announcement. He says TPUs are now a rapidly growing business with nearly 100 customers, including frontier labs, trading firms, retailers and universities. MLQ.ai notes that Google named none of them.

Systems, not new chips

Google stresses that neither addition is a new chip. In its framing, designing a chip is a multi-year process, while a system is about how compute, networking and storage are brought together around the chip, including how they are packaged. Google says it made a “foundational bet on system balance and modularity”, treating TPUs as building blocks within its AI Hypercomputer so engineers can adjust packaging, high-speed memory, optical networking and security around them. The company claims this lets it deliver specialised supercomputers “in a matter of months rather than years”.

Google also says that while it has always co-designed TPUs with Google DeepMind, it is increasingly getting feedback from external organisations. Businesses are asking for accelerators that can reason across very large context windows, and some highly regulated customers are asking for specialised encryption capabilities. The two new systems answer those two requests: what Google calls “hardware-level data security and million-token context scale”.

System	Announced	Built for	Silicon / key specs	Status
TPU 8t	April 2026	Large-scale pre-training	216 GB HBM, 128 MB SRAM per chip; 9,600-chip superpods	Coming soon
TPU 8i	April 2026	Post-training and low-latency inference	288 GB HBM, 384 MB SRAM, 8,601 GB/s HBM bandwidth per chip	Coming soon
TPU 8tx	9 Nov 2026	Confidential inference, small-scale training	TPU 8t silicon with 5th Gen AMD EPYC CPU hosts	Coming soon
TPU 8i Max	9 Nov 2026	Long-context and multi-agent inference	Two TPU 8i chips in one package	Coming soon

What TPU 8i Max adds over TPU 8i

TPU 8i Max puts two TPU 8i chips on a single package. Google says it “scales compute and memory in lockstep”, delivering double the compute, double the SRAM (fast on-chip memory) and double the HBM bandwidth of TPU 8i, so processors stay supplied with data and large workloads do not stall. HBM, or high-bandwidth memory, is the stacked memory next to the chip that holds model weights and the KV cache, the stored attention state a model reuses during a long session.

Because the package fits twice the silicon into the existing rack footprint, Google says data centres can deploy significantly more computing power per square foot and per watt. Google did not publish absolute compute or memory figures for the Max package itself.

The target workloads are memory-bound ones. MLQ.ai reports that Google points to cases such as many agents working across a large codebase or hours of video, and to the million-token context windows that its Gemini models support. For reference, Google describes TPU 8i itself as “the reasoning engine, designed to break the memory wall”, claiming it cuts inter-chip communication delays by up to half.

How TPU 8tx handles confidential inference

TPU 8tx is Google’s third eighth-generation system. Google describes it as optimised for secure and confidential inference and “also great for small-scale training”, built for regulated enterprises and governments running frontier or proprietary models and autonomous agents alongside their most sensitive data.

The problem it targets is data in use. Google explains that data is normally encrypted when stored or sent over a network, but has to be unlocked in memory while a computer processes it. TPU 8tx is built on the same silicon as TPU 8t, paired with 5th Generation AMD EPYC CPU hosts, and builds security directly into the hardware layer. MLQ.ai reports that the system keeps data and model weights isolated while they are processed.

According to MLQ.ai’s account of the announcement, Google pitches TPU 8tx as one box for both inference and small-scale training: customers can fine-tune on private data, distil large models into smaller ones and train agents with reinforcement learning without moving data between clusters. The system runs on Boardfly, the low-latency network Google built for TPU 8i, and Google claims up to 2x lower latency than TPU 8t with a near-zero performance penalty from the security features. MLQ.ai notes that Google published no absolute latency or throughput figures.

Access and the software around the chips

Neither system can be used yet. Google’s TPU product page lists TPU 8t, TPU 8i, TPU 8tx and TPU 8i Max as “coming soon”, while the seventh-generation Ironwood and sixth-generation Trillium are generally available. MLQ.ai reports that Google gave no general-availability date, pricing or regions for either new system.

Google lists four ways TPUs are used today: training and serving its own Gemini models, agentic workloads, Google Cloud services, and, most recently, customers deploying TPUs directly in their own data centres. The announcement does not say which of those routes the new systems will be offered through.

Much of the surrounding message is about software. Google says that, coupled with its recent PyTorch announcements, its aim is to make TPUs easily accessible to every developer and Cloud customer. Its product page says TPUs support PyTorch and JAX natively, support the vLLM inference engine, and can be managed across clusters with Google Kubernetes Engine (GKE). MLQ.ai reports further pieces from the announcement:

• TorchTPU, open-sourced last month, so PyTorch and Hugging Face models run natively on TPUs, with TPU backends for the vLLM and SGLang serving frameworks.
• A previewed TPU agent suite that plugs into Claude Code, Cursor and Google Antigravity for onboarding, bottleneck diagnosis and kernel tuning.
• An open-source XLA Serving Engine that serves models across TPUs, GPUs and CPUs.
• Cloud Pathways and dynamic slicing now generally available on GKE, with Google claiming up to 5x faster job startup and 4.5x faster fault recovery for dynamic slicing.

What it means for builders, and the open questions

For teams building agents that hold long sessions, very large codebases or long video in context, TPU 8i Max is Google’s answer to memory pressure rather than raw compute. Doubling SRAM and HBM bandwidth per package is aimed at keeping long-context inference from stalling. Combined with memory-tiering software such as TPU Sync, covered in the previous article, Google’s long-context story is spreading across both hardware and software.

For regulated buyers, TPU 8tx is the more significant change: it brings hardware-level confidential computing to Google’s own accelerators, for workloads where data and model weights must stay protected while in use. MLQ.ai points out that this closes a gap rather than opening a lead, since Nvidia already offers confidential computing on its GPUs.

The limits are clear in the sources:

• All numbers are Google’s. The doubling claims, the 2x latency claim for TPU 8tx and the “near-zero” security penalty come from Google, with no independent benchmarks.
• No absolute specs for the new systems. Google published no absolute figures for the 8i Max package and no absolute latency or throughput for 8tx.
• Power and cooling. Twice the silicon per package raises the question of rack power, which Google says improves per watt but does not quantify in the sources.
• Timing. The April chips these systems are built from are themselves not yet broadly available.

What to watch next

The next concrete signals are general-availability dates, regions and pricing for TPU 8i Max and TPU 8tx, which Google has not given. Also worth watching: whether the April TPU 8t and 8i reach general availability later in 2026 as Google said, whether Google publishes absolute specifications for the new packages, and whether any of the nearly 100 TPU customers Google cites go on record about using the new systems. Independent latency and throughput tests, particularly for TPU 8tx’s security overhead, will be the first real check on Google’s claims.